Platform work package 2: Scaling Fabrication

Autoprober Capability and Application to 150mm Wafer Scale Passive Components

As activities within the hub are scaled up from research towards manufacturing several 100 s of devices, the ability to rapidly characterise becomes essential. In commercial production, routine monitoring at various stages is undertaken to keep fabrication processes within specification/yield by collecting cross wafer statistics, ensuring product quality.


Figure 1 Electro optical modulation bandwidth testing on a VCSEL

Dr David Hayes (


WP 2 is about developing reliable and reproducible fabrication processes and particularly these processes at scale. However, fabrication cannot be considered in isolation and to complete WP 2 it is essential to be able to test large numbers of fabricated devices, components and circuits across large format wafers e.g. 150 mm or 200 mm diameter. Our industry standard automatic wafer prober can do that and more. Coupled with high frequency and optical test equipment it delivers a powerful research tool that is reconfigurable to combine dc, ac (to 125 GHz) and optical probe measurements which are tailored specifically for each device type, over wafer diameters up to 200 mm. An example of electro optical testing is shown in Figure 1.

Progress and Challenges

Passive capacitor, inductor and resistor components are necessary to e.g. realise GaN monolithic microwave integrated circuits (MMICs) of WP 5 and the on chip circuits integrated with the detector arrays of WP 7. Scaling up of the passive fabrication processes is initially carried out on GaAs wafers. Measured results for passives fabricated on and across 150 mm diameter GaAs wafers are presented in Figure 2 where dc continuity of the spiral
inductors and dc leakage of the dielectric capacitors is pass/fail mapped. The maps clearly illustrate high failure regions, which are subsequently investigated in more detail to flag up inappropriate fabrication approaches and improve fabrication procedures and process steps. Automatic probing at the wafer level reduces cost and speeds up development of material and
process characterisation and mm wave/photonic integrated circuits.

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