Grand Challenge 1: Enabling the Connected Nation

 The Connected Nation vision, now an EPSRC priority, requires new manufacturing concepts that  deliver small integrated communicating systems, at low cost, with a high degree of functionality.



The first grand challenge agreed with our partners is to provide a Si style manufacturing framework for CS on which to develop systems that can address both wireless and optical connectivity. This will lower manufacturing costs due to lower substrate costs and reduced processing costs, partly from the use of the larger substrates.
The manufacturing framework must provide an increased level of integration at all stages, from electronic/optoelectronic materials through device/circuit level fabrication to hybrid assembly. It should also be compatible with the high volume Si manufacturing infrastructure. We will focus on the materials integration and the device/circuit integration stages in the figure below. It is in these stages that the highest level of integration is most desirable from both the perspective of cost and functionality. These stages are highly interdependent and must be considered together. Integration that cannot be achieved at these stages will have to be accommodated by hybrid assembly, which is considerably more expensive.
Cisco’s visual networking index (VNI) forecast predicts that annual global IP wireless data traffic will exceed 24.3 Exabytes per month by 2019, and will continue to increase at a compound annual growth rate of over 50%. This is driven by the exponential increase in the number of devices such as smart phones and the increased use of interactive video and streaming. In addition, the Internet of Things (IoT), where a wide range of miscellaneous devices are connected to the internet, is expected to grow rapidly from 10.3 million devices in 2014 to more than 29.5 million in 2020. The network will need to support this rapidly growing demand for capacity, which is now considered as a motivation for 5G wireless development. Spectrum scarcity is driving the move to millimetre- wave (mm-wave) band systems and increased base station and device densities. The use of Compound Semiconductor (CS) based lighting to provide optical wireless access (Li-Fi) is also an area of interest to meet the required growth in capacity. Wireless access devices, from Smart phones to the IoT, depend on CS devices for both transmit power amplifiers and low noise receiver pre-amplifiers. Power management is a critical requirement for these distributed systems. For example, the energy efficiency of the transmit CS power amplifier has the potential to limit the development of 5G wireless. Every optical link that enables the internet, from a rack to rack, active optical cable to a trans-oceanic optical fibre system uses CS optical sources because they enable high speed, power efficient data transmission.

CS devices are already critical in providing the system connectivity, whether optical or wireless, and future systems will require integration of these functions. Hence the need to establish a CS manufacturing framework to develop the integrated systems to populate the “Internet of Things”.

The key enabling manufacturing technologies for meeting this challenge are
  • The epitaxial growth of CS materials on Si substrates
  • Using Foundry like CS process flows to provide the device/circuit integration platform.

Together these solutions, as shown conceptually in the ” Fundamental Challenges” figure, must allow for the integration of optoelectronic, power electronic, wireless communications and information processing IC’s. Here we will focus on the CS communication elements both optoelectronic and high frequency electronic devices and their integration. It is envisaged that the Si substrate and process flows will also be able to support the integration of other devices/circuit structures being developed under current EPSRC funded projects.We have already demonstrated the ability to grow high quality CS on Si through the use of Ge buffer layers and strained layer dislocation filters, nanopillar arrays, and misfit dislocation arrays.

GC1 Programme and Methodology

WP 4 Manufacturing Technology for Optical Datacommunications on Si.

WP 5 Advanced RF Devices and MMICs

WP 6 Monolithic integration of RGB LEDs and integrated RF electronics for LiFi


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